... of complex SoCs and subsystems- Work on AMBA protocols (AXI/AHB/APB) verification- Verify power management features (PMU, low-power scenarios, UPF-based verification)- Debug simulation failures and root-cause issues efficiently- Collaborate with design, architecture, and validation teams to ensure high-quality silicon- ...
... supporting a follow-the-sun coverage model. - Manage the SIEM day to day: log source onboarding, normalization, retention, correlation rule development, and validation of alert use cases. - Maintain the operating model with our managed detection partners — escalation thresholds, containment ownership, and handoff procedures. ...
... ASIC/SoC Design-for-Test. The candidate should have strong expertise in Scan Insertion, ATPG and MBIST , with good exposure to DFT architecture, timing, verification and production test flows. Own and execute DFT implementation flows from RTL/netlist through signoff. Hands-on experience in Scan insertion, scan chain stitching ...
... verification, and UAE-based business processes. Track and manage sales leads received through Google Sheets and WhatsApp. Contact customers by phone for verification and validation of sales leads. Follow the required CPR and quality guidelines during every validation call. Complete the first customer call within the required ...
Retirement Valuation Analyst-North America & Great Britain - 202507229 - Gurugram, Haryana, India - Mumbai, Maharashtra, India - Full time View favourites Description About WTW Willis Towers Watson (NASDAQ: WLTW) is a leading global advisory, broking and solutions company that helps clients around the world turn risk
Job Description :- Deep understanding of C, embedded programming, and hardware/software co-validation methodologies.- Strong knowledge of SoC verification environments, SystemVerilog (SV), and UVM concepts.- Proven history of developing and executing verification and validation strategies for complex https://jobeax.com/link/uFGC7KBr9n8EMqJe ...
... Softbank Group of companies driving sustainable computing for AI, Cloud, and edge applications. As a part of the Emulation Team at Ampere, you will be part of verification of the next generation of microprocessor cores on hardware emulation platform by developing and deploying new capabilities and test content to accelerate ...
The Role and Impact Intel is seeking a Formal Verification Engineer for the Silicon Chassis team. You will work closely with architecture, design, and software teams and are expected to contribute across traditional discipline boundaries. This role requires strong Formal depth, solid protocol knowledge, hands-on coding ...
... stack to identify bottlenecks and design stress scenarios that push the system to its operational limits.- Collaborate with cross-functional teams (design, verification, architecture, software) to align validation strategies with product requirements.- Debug and resolve issues at the hardware-software boundary, providing ...
... stack to identify bottlenecks and design stress scenarios that push the system to its operational limits.- Collaborate with cross-functional teams (design, verification, architecture, software) to align validation strategies with product requirements.- Debug and resolve issues at the hardware-software boundary, providing ...
... impact- Interface with foundry to resolve design rule clarifications and obtain waiver approvals- Mentor verification engineers on debugging techniques and verification best practices- Develop verification automation and flow improvements to enhance productivity- Conduct verification correlation studies and drive signoff ...
... alignment with FDA QSMR requirements and applicable ISO standards. Support design control activities throughout the product lifecycle, including risk management, verification, validation, and design transfer. Conduct thorough root cause analyses for quality issues using tools such as FMEA, 5-Why, and Fishbone diagrams. Collaborate ...
... AI-assisted test design, evidence automation, and continuous improvement of test processes. The role combines Python automation framework development, HIL validation, Android display testing, functional safety exposure, and AI-assisted test design to improve test coverage, traceability, release quality, and validation efficiency. ...
Job Description Summary Activities contributing to the verification and validation of PET-CT medical imaging systems, covering multi-disciplinary areas including software, hardware, electronics, image quality, radiation safety, and system integration. The role emphasizes automation-driven verification and validation methodologies ...
Qualcomm India Private Limited Engineering Group, Engineering Group Hardware Engineering PMIC Systems & Validation Engineer Qualcomm's Power Management Systems, Validation & Integration team (PMIC-SVI) leads the industry in the system architecture and post-silicon validation of high-performance feature-rich Power Management ...
The candidate will work as a design verification engineer for wireless communication ASICs development in Pune, India. You will be in the center of the organization impacting and influencing many cross-functional teams. Roles And Responsibilities Maintain and develop SystemVerilog/UVM methodology test bench within digital ...
... leadership role, you will build and lead a high-performing team of systems engineers, owning end-to-end system architecture, requirements management, and verification & validation across our unmanned aerial platforms — including hybrid VTOL/fixed-wing systems. You will be the technical authority bridging mechanical, electrical, ...
... experienced Staff Engineers capable of owning complex IP and subsystem verification programs. Depending on experience and role level, engineers may contribute to verification environment development, test creation and debug, own verification of an IP or major feature, lead subsystem-level verification, or provide technical direction ...
... violations, timing issues, and integration corner cases during pre-silicon verification - Your reusable verification IP and testbench architectures will accelerate verification timelines for future product generations and reduce bring-up time for derivative designs - You will influence verification methodology and best practices ...