Job Description – DDR Memory Validation Engineer (Post-Silicon Validation) Job Title: DDR Memory Validation Engineer Experience: 5-12 Years Location: Bangalore Qualification: Bachelor's or Master's Degree in Electronics, Electrical Engineering, Computer Engineering, or related field Role Overview We are seeking an experienced ...
... industries may also be consideredespecially those with substantial experience in digital design verification, safety-critical systems, or complex hardware validation environments. These sectors often develop high-quality engineering talent with strong discipline in verification processes, making them a valuable pool for ...
... advantage and improve the everyday lives of people around the globe. We operate in over 25 countries. A job opening matching your profile for a position of Verification & Validation Engineer- 2019-3210, has been just posted on our career section. If you are interested, kindly apply . We thank you for your interest in Expleo. ...
Position: AMS SPICE Verification Engineer (BB50FT RM 4387) Role Overview We are seeking an AMS SPICE Verification Engineer with 5+ years of experience in analog/mixed-signal simulation and verification at block, subsystem, and chip-top levels. Key Responsibilities Develop verification plans and AMS SPICE testbenches. Perform ...
... in a relevant discipline. Experience with memory subsystem verification . Experience working on complex SoC/full-chip verification environments . Exposure to functional coverage, constrained-random verification and verification planning. Familiarity with simulation/debug environments and common EDA verification flows.
... Engineering. - 8+ years of experience in ASIC or FPGA design verification. - Expertise in Hardware Description Languages (HDL) like Verilog or VHDL and Hardware Verification Languages (HVL) such as System Verilog. - Strong hands-on experience in developing UVM-based testbenches and verification components. - Experience with RISC-V ...
Position Title: Mixed-Signal Verification Engineer (AMS Verification) Location: Bengaluru Job Description Good fundamentals in analog and mixed signal circuit concepts and topologies. Experience working with mixed signal verification environment, simulation, and regression tools such as Cadence Virutuoso, Spectre, xCelium, ...
... regressions and analyze results for functional and performance issues. Document test plans, verification environments, and test results. Participate in design and verification reviews. Required Skills: - 4+ years of hands-on experience in functional verification of IP/SoC. - Strong knowledge and working experience with SystemVerilog ...
... engineering teams throughout the verification lifecycle. - Participate in design and verification reviews and contribute technical recommendations. - Maintain verification documentation, test plans, environments, results, and closure reports. - Mentor junior verification engineers and contribute to verification best practices ...
Physical Verification Engineer Job Description Work with various implementation team to drive full-chip Physical Verification Sign-off closure in the area of (DRC, LVS, ANT, ERC, ESD, PERC) for tape-out. Co-work with Place & Route team to resolve full-chip layout integration issues. Work with various implementation team ...
... of hands-on experience in design verification of high-speed interfaces such as DDR, PCIe, UCIe, or NVMe . - Expertise in SystemVerilog and UVM (Universal Verification Methodology). - Strong understanding of digital design principles, verification methodologies, and simulation tools. - Familiarity with protocol specifications ...
... seeking a highly motivated Formal Verification Engineer with 6-8 yeas of experience to join our GCAD Formal team. The ideal candidate will have strong formal verification fundamentals, hands-on experience with formal tools, excellent analytical and scripting skills, and the ability to drive innovative verification methodologies. ...
... / Head of Verification.Experience: 3-20 YearsJob Description : - In this role, you will be part of the ASIC verification team responsible for functional verification of ASIC IPs. ASIC verification methodology employs state of the art techniques and tools, including coverage-driven constrained random verification and formal ...
... device product development and life cycle management programs, driving system architecture, requirements management, risk management, product integration, verification & validation, and regulatory compliance from concept through commercialization and post-market support. Key Responsibilities Lead system definition, requirements ...
... you! Engineering Management Perform in-depth Requirements Analysis system requirements to support project needs. Collaborate with stakeholders to coordinate Verification & Validation activities through all project phases. Ensure the quality and consistency of systems engineering deliverables. Manage and ensure effective communication ...
... current, and defibrillation waveform integrity (biphasic/monophasic) as influenced by lead and electrode design. Support component-level risk assessments (e.g., Verification, Validation & Risk Management Drive design verification and validation (V&V) activities, including test protocol development, bench testing, and simulated-use ...
... and mission impact of the software item. - Develop, implement, monitor and review Software Product Assurance (SW PA) plans. - Oversee and participate in verification and validation (V&V) activities according to defined V&V plans. - Support Independent Verification and Validation (IV&V) activities, working with IV&V personnel ...
... across multiple programs. Collaborate with Design, Architecture, Firmware, Validation, and Program Management teams across global sites. Define and drive verification strategies for complex IPs, subsystems, and SoCs. Drive continuous improvements in verification methodologies, automation, regression efficiency, and reusable ...
... memory.- Perform IP integration and top-level SoC assembly.- Develop scalable and reusable design https://jobeax.com/link/FHvgmQzMwBn8zOiq Development & Verification :- Lead RTL coding, lint, CDC, RDC, and quality checks.- Collaborate with verification teams on test plans, coverage closure, and regression signoff.- Debug ...