FPGA Design Engineer Hughes Systique Corporation (HSC) , a leading global digital solutions and service provider, is expanding its team in Dehradun, Uttarakhand . This is a great opportunity for FPGA Design Engineers to work on cutting-edge projects with a multinational company—right here in Dehradun.
About the Role:We are looking for a Functional DFT / Test Engineer to join the Test Development team and work on advanced 7nm FPGA/MPSoC products. - Experience with simulation and basic lab/bench equipment. tech)
' : - ( - ) Experience: 2+ yrs Location: chennai,hyderabad,bangalore Job Type: Full-time We are looking for a skilled FPGA Design Verification Engineer with hands-on experience in the Xilinx Vivado implementation flow to validate and test FPGA implementation stages, including placement and Static Timing Analysis (STA).
' : - ( - ) Experience: 2+ yrs Location: chennai,hyderabad,bangalore Job Type: Full-time We are looking for a skilled FPGA Design Verification Engineer with hands-on experience in the Xilinx Vivado implementation flow to validate and test FPGA implementation stages, including placement and Static Timing Analysis (STA).
' : - ( - ) Experience: 2+ yrs Location: chennai,hyderabad,bangalore Job Type: Full-time We are looking for a skilled FPGA Design Verification Engineer with hands-on experience in the Xilinx Vivado implementation flow to validate and test FPGA implementation stages, including placement and Static Timing Analysis (STA).
com/link/At3cl7PLE9ri1ltS in Electronics & Communication Required Skills:Key Responsibilities: 1. 2. com/link/air73mbNKl9ankvq Stewardship: Ability to execute projects within planned timelines. tech)
' : - ( - ) Experience: 4+ yrs Location: Hyderabad, Telangana, India, Bengaluru Job Type: Full-time We are looking for an experienced FPGA/RTL Engineer to contribute to the design, development, simulation, implementation, and debugging of FPGA-based systems.
Job Description :The project involves validating all the features and interfaces supported on the FPGA by creating and using validation designs that are partitioned into RTL and Embedded Processor Application. Test and debug the silicon on board with the help of lab equipment and protocol testers.