leadic design pvt ltd
Design Validation Engineer - Electronic
Experience: 3+yrs Location: Hyd/Blr Job Overview We are looking for a Design Verification Engineer with hands-on experience in SystemVerilog/UVM, Verilog, pre-silicon verification and Gate-Level Simulation (GLS) to work on SoC/full-chip DRAM verification . The ideal candidate should have strong fundamentals in digital/analog ...
Rāniganj, भारत