Sykatiya Technologies Pvt Ltd
Sykatiya Technologies - RTL Design Engineer - Verilog/ASIC
... UPF- Experience in implementing ECOs- IP development and coding using standard coding guide lines- Must have strong knowledge of AMBA AHB/AXI protocol- Working knowledge on code coverage, functional coverage, Lint, CDC, Formality etcAvailability : Immediate / 30 Days- References are most appreciate - (ref:hirist.tech)
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