The candidate will work as a design verification engineer for wireless communication ASICs development in Pune, India. You will be in the center of the organization impacting and influencing many cross-functional teams. Roles And Responsibilities Maintain and develop SystemVerilog/UVM methodology test bench within digital ...
... architectural shift in 40 years: 2nm and beyond delivers marginal performance gains. Google, Microsoft, Amazon, Meta, OpenAI — they're all designing their own ASICs. We're entering the market at exactly the moment when every major AI/HPC player needs what we're building, and their alternatives are disappearing. No Politics, ...
... or ML graph compilers. - Proficiency in AI graph compiler frameworks (e.g., MLIR , Torch-FX) - Solid background in hardware architectures (e.g., GPUs, TPUs, ASICs) and optimization techniques such as fusion, quantization, and tiling. - Familiarity with neural networks operators and code generation. - Strong understanding ...
Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI.
Experience: 3-20 YearsJob Description : - In this role, you will be part of the ASIC verification team responsible for functional verification of ASIC IPs. ASIC verification methodology employs state of the art techniques and tools, including coverage-driven constrained random verification and formal verification.
... Design, implementation, and Timing analysis. Experience with RTL coding using Verilog/VHDL/System Verilog. Experience in micro-architecture & designing cores and ASICs. Exposure in scripting (Pearl/Python/TCL). Strong debugging capabilities at Synthesis, timing analysis & implementation Collaborate closely with cross-function ...
... Silicon One. Our unique team works in a startup atmosphere inside a stable and leading corporate and develops the full software stack enabling the Silicon One ASICs. Join a team of dedicated engineers with a proven track-record at delivering breakthrough products. Our R&D center is outstanding - hosting all silicon HW and ...
... Summary: We are looking for a talented and experienced RTL Design Engineer to join our team and play a key role in the design and development of next-generation ASICs/SoCs. You will be responsible for all aspects of RTL design, from concept to RTL coding, verification, and integration. Responsibilities: Develop RTL code for ...
... faster to launch, easier to manage and more adaptive in real time. Leading brands including Steve Madden, LG Electronics, Subaru of America, Dolce & Gabbana, ASICS, Decathlon, and Caesars Entertainment rely on Contentstack to reduce operational friction and deliver personalized, scalable digital experiences with confidence. ...
... Practical experience of working on Processor based system designs 'Nice To Have' Skills And Experience Hands on Experience in validating multiple sub systems for ASICs/ SoCs in system environment ( across Emulation, FPGA and Development/Eval board), owning all phases of validation ( Test development, Execution and Debug) for ...