Astera Labs
Tech Lead ASIC Design Engineer
- Hybrid
... through RTL optimization. - Support synthesis, lint, CDC/RDC, STA, DFT, and design sign-off activities. - Participate in design reviews and ensure compliance with RTL coding guidelines and design best practices. - Drive debug and resolution of RTL, integration, and post-silicon issues in collaboration with firmware, validation, ...
Bengaluru, भारत