Static Timing Analysis Lead in Bengaluru, India

• Full-time

... Work with Vivado implementation stages including placement and Static Timing Analysis (STA) . - Analyse implementation results and identify potential design, timing, and flow-related issues. - Validate FPGA designs against defined implementation and timing requirements. - Perform Static Timing Analysis and analyse timing ...

• Full-time

... VC SpyGlass, or equivalent static-analysis platforms. - Develop and review SDC timing constraints and collaborate with Synthesis and Physical Design teams on timing requirements. - Analyse synthesis, timing, area, and power results and resolve RTL-level integration issues. - Implement functional and timing ECOs while maintaining ...

... complete RTL-to-GDSII implementation https://jobeax.com/link/dm5XJdshy5o6nSFW Skills :- RTL-to-GDSII Flow- Verilog/SystemVerilog- SoC Integration- Synthesis- Static Timing Analysis (STA)- Clock Domain Crossing (CDC)- Low-Power Design Methodologies (UPF/CPF)- Physical Design Concepts- DFT (Scan, MBIST, LBIST, JTAG, ATPG)- ...

... complete RTL-to-GDSII implementation https://jobeax.com/link/dm5XJdshy5o6nSFW Skills :- RTL-to-GDSII Flow- Verilog/SystemVerilog- SoC Integration- Synthesis- Static Timing Analysis (STA)- Clock Domain Crossing (CDC)- Low-Power Design Methodologies (UPF/CPF)- Physical Design Concepts- DFT (Scan, MBIST, LBIST, JTAG, ATPG)- ...

8k

ProArch is seeking an experienced Technical Lead to design, develop, and maintain automation solutions for enterprise storage environments. The primary focus of this role will be automating storage pool monitoring, alerting, and operational actions across production environments, ensuring high availability, operational ...

JD for MBD Leader Experience- 12- 18 Years. Location- Pune – Kalyani Nagar Key Responsibilities: Develop high-fidelity models for electric motors and battery systems, capturing dynamic, thermal, and electrical characteristics. Design and simulate motor control algorithms such as Field-Oriented Control (FOC) , sensorless ...

... solution empowers teams to operate with increased agility and deliver significantly superior performance compared to CPU-based alternatives We're seeking a Static Timing Analysis experience individual. As part of our DPU silicon team, you'll take on the challenge of driving our STA execution from early design exploration ...

... targets. 6) Logic simulations and detailed timing analysis of key paths in high speed memory design. 7) Signal-Integrity (EM) and Power-Integrity (IR drop) analysis and design. 1) Expertise of high speed/low power CMOS circuit design, clocking scheme, Static and dynamic logic circuits 2) Experience in Designing and driving ...

Job Title :Senior DFT EngineerAbout the Role :We are seeking a seasoned DFT professional to lead architecture, scan insertion, and compression efforts at both core and SoC levels. The role involves endtoend ATPG pattern generation, coverage analysis, and verification through timing and nontiming simulations, as well as ...

... technology nodes. Good technical knowledge of power-performance trade-offs in high-speed DDR and/or SerDes architectures Direct experience in all phases of design analysis including functional, static timing and electrical sign-off Strong understanding of the impact of variation on design performance Academic Credentials ~ Desired: ...

• Hybrid

... controllers - High-speed interconnects Tools & Methodologies - Verilog/System Verilog - Synopsys Design Compiler - Cadence Genus - SpyGlass (Lint/CDC/RDC) - Static Timing Analysis (STA) - Git or other version control systems - Python, Tcl, Perl, or Shell scripting Preferred Experience - Experience designing connectivity, ...

401k

... Minimum 5-10 years of related work experience. Knowledge of analog electronics and experience with board-level design and debug. Experience in statistical analysis of test data. Hands-on experience with electronics lab instrumentation. Prior experience with metrology systems for evaluating timing parameters is preferred ...

• Full-time

... video creatives, and static designs aligned with performance outcomes. High ownership and autonomy in shaping creative output Clear growth path toward Creative Lead / Head of Design Flexible working culture focused on health, innovation, and growth Examples of video, motion, and static ad creatives (paid social ads or email ...

... GitHub Actions for embedded software builds across multiple branches, repositories, and teams Automate build, test, and release workflows covering compilation, static analysis, and binary packaging Manage build artefact lifecycle — hosting intermediate build outcomes and archiving binaries using JFrog Artifactory Infrastructure ...

Rs 4 - 8 lakhs p.a.

... level Static(IR)/Dynamic(IVD) sign-off Signal/Power EM sign-off at Block level and Full chip Custom power grid implementation for block/hardmacs System level Analysis (PDN) with board, package, interposer and die Work with SoC and packaging team in bump assignment, pkg routing optimization Dynamic analysis with vectorless/vectors/mixed ...

Job Description: Experience: 3-5 Years Perform stress analysis of metallic and composite aircraft structures using classical methods, ISAMI, GFEM, and DFEM. Extract loads, stresses, material data, geometry details, and fastener specifications from part and assembly drawings. Apply appropriate static design values from standard ...

• Remote

Job Requirements Remotely support of Maintenance Planning of rotating equipment and static equipment. Create job packages (work packs) Job procedure/Standard Maintenance procedures (SMP) of static and rotating equipment. Plan all the maintenance activities such as preventive, predictive & breakdown maintenance and record ...

• Remote

... solutions. You have a deep understanding of front-end design flows, timing constraints, and the intricate interactions between synthesis, place & route, and analysis tools. You take ownership of your work, showing accountability and technical leadership in every project. Your collaborative spirit shines through as you engage ...

... DFT RTL integration, synthesis, and implementation.- Develop and debug ATPG patterns, analyze coverage, and resolve test-related issues.- Work on scan chain analysis, test modes, constraints, and DFT timing.- Perform DFT verification including simulations, ATPG validation, and coverage analysis.- Debug DFT-related issues ...