Vacancy description
Career Makers
India, Bengaluru
Static Timing Analysis Lead in Bengaluru, India is listed on Jobeax. Browse 30,000+ vacancies available.
Job Description :- 10 years with expertise in full-chip timing closureKey Responsibilities :- Lead full-chip static timing analysis and drive timing signoff for complex SoC designs- Develop advanced timing methodologies incorporating AOCV, POCV, and statistical timing analysis- Mentor timing engineers on advanced STA techniques, debugging strategies, and tool usage- Interface with design, synthesis, and physical implementation teams to resolve timing challenges- Conduct multi-voltage domain analysis and ensure proper timing across voltage level shifters- Establish timing quality metrics and implement continuous improvement initiatives- Evaluate new timing analysis tools and methodologies for improved accuracy and efficiency- Lead timing aspects of design reviews, tapeout readiness assessments, and post-silicon correlation (ref:hirist.tech)
Similar vacancies
Weekday AI
... VC SpyGlass, or equivalent static-analysis platforms. - Develop and review SDC timing constraints and collaborate with Synthesis and Physical Design teams on timing requirements. - Analyse synthesis, timing, area, and power results and resolve RTL-level integration issues. - Implement functional and timing ECOs while maintaining ...
India, Bengaluru
Exiger Technologies Pvt Ltd
... complete RTL-to-GDSII implementation https://jobeax.com/link/dm5XJdshy5o6nSFW Skills :- RTL-to-GDSII Flow- Verilog/SystemVerilog- SoC Integration- Synthesis- Static Timing Analysis (STA)- Clock Domain Crossing (CDC)- Low-Power Design Methodologies (UPF/CPF)- Physical Design Concepts- DFT (Scan, MBIST, LBIST, JTAG, ATPG)- ...
India, Bengaluru
Exiger Technologies Pvt Ltd
... complete RTL-to-GDSII implementation https://jobeax.com/link/dm5XJdshy5o6nSFW Skills :- RTL-to-GDSII Flow- Verilog/SystemVerilog- SoC Integration- Synthesis- Static Timing Analysis (STA)- Clock Domain Crossing (CDC)- Low-Power Design Methodologies (UPF/CPF)- Physical Design Concepts- DFT (Scan, MBIST, LBIST, JTAG, ATPG)- ...
India, Bengaluru
Embark
Lead in fit-gap analysis exercise to assess business requirements and align them with out of the Establish user stories and backlog items, and prepare test specifications utilizing agile Prepare key implementation deliverables business requirements documentation, functional Proven track record of delivering strategy and ...
India, Thiruvananthapuram
ProArch
8k
ProArch is seeking an experienced Technical Lead to design, develop, and maintain automation solutions for enterprise storage environments. The primary focus of this role will be automating storage pool monitoring, alerting, and operational actions across production environments, ensuring high availability, operational ...
India, Pune
L&T Technology Services
JD for MBD Leader Experience- 12- 18 Years. Location- Pune – Kalyani Nagar Key Responsibilities: Develop high-fidelity models for electric motors and battery systems, capturing dynamic, thermal, and electrical characteristics. Design and simulate motor control algorithms such as Field-Oriented Control (FOC) , sensorless ...
India, Pune
Microsoft Corp
... solution empowers teams to operate with increased agility and deliver significantly superior performance compared to CPU-based alternatives We're seeking a Static Timing Analysis experience individual. As part of our DPU silicon team, you'll take on the challenge of driving our STA execution from early design exploration ...
India, India
Broadcom
... targets. 6) Logic simulations and detailed timing analysis of key paths in high speed memory design. 7) Signal-Integrity (EM) and Power-Integrity (IR drop) analysis and design. 1) Expertise of high speed/low power CMOS circuit design, clocking scheme, Static and dynamic logic circuits 2) Experience in Designing and driving ...
India, Bengaluru
AMD Ventures
... technology nodes. Good technical knowledge of power-performance trade-offs in high-speed DDR and/or SerDes architectures Direct experience in all phases of design analysis including functional, static timing and electrical sign-off Strong understanding of the impact of variation on design performance Academic Credentials ~ Desired: ...
India, Bengaluru
Work at office
India
Astera Labs
... controllers - High-speed interconnects Tools & Methodologies - Verilog/System Verilog - Synopsys Design Compiler - Cadence Genus - SpyGlass (Lint/CDC/RDC) - Static Timing Analysis (STA) - Git or other version control systems - Python, Tcl, Perl, or Shell scripting Preferred Experience - Experience designing connectivity, ...
India, Bengaluru
401k
... Minimum 5-10 years of related work experience. Knowledge of analog electronics and experience with board-level design and debug. Experience in statistical analysis of test data. Hands-on experience with electronics lab instrumentation. Prior experience with metrology systems for evaluating timing parameters is preferred ...
India, Bengaluru
Fourth Frontier
... video creatives, and static designs aligned with performance outcomes. High ownership and autonomy in shaping creative output Clear growth path toward Creative Lead / Head of Design Flexible working culture focused on health, innovation, and growth Examples of video, motion, and static ad creatives (paid social ads or email ...
India, Bengaluru
Quest Global
Job Requirements Remotely support of Maintenance Planning of rotating equipment and static equipment. Create job packages (work packs) Job procedure/Standard Maintenance procedures (SMP) of static and rotating equipment. Plan all the maintenance activities such as preventive, predictive & breakdown maintenance and record ...
India, Bengaluru
leadsoc technologies pvt ltd
... Memory circuit design . Expertise in Cadence Virtuoso and transistor-level simulation. Strong understanding of CMOS fundamentals, device physics, and circuit analysis . Experience with SPICE simulations, PVT corners, Monte Carlo, and statistical analysis . Knowledge of memory timing, stability, leakage, power, and yield optimization ...
India, Bengaluru
Synopsys Inc
... solutions. You have a deep understanding of front-end design flows, timing constraints, and the intricate interactions between synthesis, place & route, and analysis tools. You take ownership of your work, showing accountability and technical leadership in every project. Your collaborative spirit shines through as you engage ...
India, Bengaluru
Mirafra Software Technologies Pvt Ltd
... DFT RTL integration, synthesis, and implementation.- Develop and debug ATPG patterns, analyze coverage, and resolve test-related issues.- Work on scan chain analysis, test modes, constraints, and DFT timing.- Perform DFT verification including simulations, ATPG validation, and coverage analysis.- Debug DFT-related issues ...
India, Hyderabad
Contentstack
... companies to create exceptional digital experiences. This role will interface largely with the Design Manager and Creative Producer. Content and Earned Media Leads, as well as internal stakeholders. Strong English reading comprehension is required for this role. Proficient in Adobe Creative Suite and Figma: After Effects, ...
India, Bengaluru
Evernorth Health Services
... tracing analysis and service dependency mapping - Familiarity with infrastructure as code (Terraform) for observability resource management - Background in statistical analysis and machine learning for anomaly detection - Experience with business intelligence tools (Tableau, PowerBI) for executive reporting integration
India, Hyderabad