Senior Staff Engineer, Design Verification (Power & Analog IC's) in Bangalore, भारत

Renesas is a global semiconductor leader shaping the backbone of next‑generation automotive, industrial, cloud, and IoT innovation. With over $9.3 billion in annual revenue (2024) and a world‑class team of 22,700+ employees, Renesas operates at scale while retaining the agility to drive category‑defining breakthroughs. The company’s footprint spans more than 30 countries, enabling deep customer proximity and a uniquely global innovative engine. As Japan’s semiconductor powerhouse and a top global player in microcontrollers, analog, and power technologies, Renesas delivers real‑world impact across EVs, smart factories, renewable energy infrastructure, and edge intelligence. For ambitious problem‑solvers who want to work on meaningful, systems‑level challenges with huge industry leverage, Renesas offers the scale, stability, and strategic clarity of a market leader—paired with the transformative momentum of a company reinventing how the world computes, connects, and electrifies.

Renesas has a growing presence in India with HC approaching 1000+ and significant presence with active government and university collaboration as well as OSAT footprint (JV with CG India). With the growing importance of India as a market (Growing semiconductor market and government goals / mandates of localization needs) and talent hub, our division’s (India for India) mission is to grow India market. We aspire to create products (SoCs, Software, Power and Analog chips etc) which serve needs for local market. Renesas is a leading electronics supplier globally, and this is a unique opportunity to directly influence the future products which will be offered to our customers in a new, fast growing and large Indian market with specific needs and applications.

Job Description

We are looking for a motivated and talented Digital Design Verification Engineer to join our team in creating next-generation Power management solutions. 

• Define and own verification plans, methodologies, and coverage strategies for complex SoC designs
• Architect and implement verification environments from scratch and enhance existing frameworks
• Drive block-level, subsystem-level, and full-chip verification
• Build Agents, sequences, drivers, monitors, and scoreboards as part of automation.
• Integrate industry-standard VIPs, create custom transactor.
• Lead end2end verification, including: Gate level simulations and debugs, coverage analysis and closure, regression, triage failures, and ensure quality sign-off
• Mentor junior and mid-level verification engineers
• Act as technical lead or owner for key verification deliverables

Qualifications

• Bachelor's degree in Electrical Engineering or equivalent practical experience.
• Overall 12+ years of experience with verification methodology such as universal verification methodology (UVM).
• Experience with industry-standard simulators, revision control systems, and regression systems.
• Experience with Architecting block the full verification lifecycle.
• Excellent problem solving and communication skills.
• Construct testbenches components like scoreboard, agents, sequencers, and monitors
• Debugging RTL and Gate simulations and working with cross functionals team to verify fixes
• Converting verification tests to test patterns and assisting Test Engineers on ATE vector bring up
• Experience developing and maintaining verification testbenches, test cases, and test environments.
• Understanding of SoC architecture and functionality, Mixed signal designs.
• Good knowledge of analog components : ADC, DAC, PLL, Oscilators and PI controllers. 
• Passion for learning and engineering great solutions
• Proven written and verbal communication skills that demonstrate clarity of thought and conviction
• Working knowledge of one or more scripting languages (Perl, Python) and ability to use them to automate/accelerate verification and analysis tasks
• Experience of directed and constrained random verification methodology Good knowledge in UVM, Verilog, SV, C/C++, Shell, Python
• Strong debug, logical thinking and analytical skills

Additional Information

Renesas is an embedded semiconductor solution provider driven by its Purpose, To Make Our Lives Easier . With a global team of over 21,000 engineers and problem solvers in more than 30 countries, we offer the opportunity to work on world‑leading technology for Automotive, Industrial, Infrastructure, and IoT, shaping a safer, healthier, greener, and smarter future.

At Renesas, TAGIE is our culture, grounded in being Transparent, Agile, Global, Innovative, and Entrepreneurial. It shapes how we work, grow and deliver on our purpose together. This collaborative spirit and mindset drive our semiconductor technology to transform industries and impact millions of lives.

We believe in rewarding our employees with a competitive benefits package alongside their salary. More information will be provided during the hiring process.

Are you ready to join our team and shape the future with us?

Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our  Diversity & Inclusion Statement .