Back to list

Vacancy description

RTL Design Lead in Bangalore, भारत

Erbity Private Limited

Bangalore, भारत

Job Description:

  • Lead RTL design activities for complex ASIC/SoC development projects.
  • Work closely with architecture and verification teams to define micro-architecture and implementation strategies.
  • Develop high-quality RTL using Verilog/SystemVerilog.
  • Drive block-level design, integration, lint, CDC, and synthesis activities.
  • Ensure design quality and timely project execution.
  • Debug and resolve design issues during simulation, synthesis, and silicon bring-up stages.
  • Collaborate with cross-functional teams including DFT, Physical Design, and Verification.
  • Mentor junior engineers and support technical reviews.

Required Skills:

  • Strong experience in RTL Design for ASIC/SoC projects.
  • Hands-on expertise in Verilog/SystemVerilog.
  • Good understanding of AMBA protocols (AXI/AHB/APB).
  • Experience with synthesis, lint, CDC, and low-power design methodologies.
  • Strong debugging and problem-solving skills.
  • Prior team handling or technical leadership experience is preferred.

Similar vacancies

More like this role

Role : Principal / Lead RTL Design EngineerAbout the Role : We are looking for a highly experienced Principal / Lead RTL Design Engineer to provide technical leadership for complex ARM-based ASIC/SoC development programs. The role involves driving RTL architecture and implementation, owning critical subsystems, defining ...

Chennai, भारत

... through implementation and sign-off. Responsibilities and Duties - Provide technical leadership for microarchitecture, RTL design and SoC integration, driving design decisions and trade-offs across functionality, performance, power and area. - Lead engineering execution and delivery of complex SoC designs, ensuring alignment ...

Bangalore, भारत

... scripting technologies.- Review and guide verification architecture, test plans, environments, and critical verification components.- Collaborate with architecture, RTL design, firmware, validation, and system engineering teams.- Mentor senior engineers and technical leads and establish engineering best practices.- Drive technical ...

Bangalore, भारत

  • Full-time
... verification of AMBA protocols and ARM CPU-based systems.- Work on PCI Express and/or Ethernet protocol verification as required.- Analyze complex failures and lead root-cause debugging across RTL, testbench, and system-level environments.- Collaborate closely with RTL designers, architects, firmware, validation, and system ...

Ernakulam, भारत

ALTEN CALSOFT LABS (INDIA) PRIVATE LIMITED

ACL Digital - Physical Design Engineer

Role : Physical Design EngineerACL Digital is looking for a Physical Design Engineer to lead end-to-end RTL-to-GDSII execution for high-performance FinFET ASICs across 16nm - 5nm and dual-patterning technology nodes. The role focuses on physical implementation, timing and power optimization, physical verification, and automated ...

Bangalore, भारत

NEUREALM PRIVATE LIMITED

Senior Physical Design Engineer/Lead

  • Full-time
Job Title : Senior Physical Design Engineer / LeadExperience : 9-14 YearsLocation : Bangalore / Kochi / Chennai / PuneEmployment Type : Full-timeAbout the Role : Neurealm is seeking an experienced Senior Physical Design Engineer / Lead to drive physical implementation activities for complex ASIC/SoC https://jobeax.com/link/Ed3TrripOdfvyAWA ...

Pune, भारत

NEUREALM PRIVATE LIMITED

Senior Physical Design Engineer/Lead

  • Full-time
Job Title : Senior Physical Design Engineer / LeadExperience : 9-14 YearsLocation : Bangalore / Kochi / Chennai / PuneEmployment Type : Full-timeAbout the Role : Neurealm is seeking an experienced Senior Physical Design Engineer / Lead to drive physical implementation activities for complex ASIC/SoC https://jobeax.com/link/Ed3TrripOdfvyAWA ...

Bangalore, भारत

... improve physical design methodologies, flows, and sign-off practices.- Identify technical risks early in the implementation cycle and drive mitigation plans.- Lead debugging and root-cause analysis of complex physical design and timing issues.- Collaborate with RTL design, architecture, synthesis, STA, verification, and ...

Chennai, भारत

... improve physical design methodologies, flows, and sign-off practices.- Identify technical risks early in the implementation cycle and drive mitigation plans.- Lead debugging and root-cause analysis of complex physical design and timing issues.- Collaborate with RTL design, architecture, synthesis, STA, verification, and ...

Bangalore, भारत

  • Hybrid
  • Full-time
... predictability from RTL to GDSII. Qualifications & Skills - Education & Experience: Bachelor’s or Master’s degree in Electrical/Electronics Engineering, VLSI Design, or a related field, with 8+ years of experience in semiconductor physical design, with a strong focus on clocking architecture and implementation. - Technical ...

India, भारत

  • Remote
... Creating comprehensive architecture and micro-architecture documents, translating functional specifications into detailed design solutions for complex components. - Leading and executing design tasks including RTL coding, synthesis, CDC analysis, debugging, and test development, ensuring robust and reliable ASIC designs. - Collaborating ...

Hyderabad, भारत