... technical expertise in RTL design with proven people leadership, project execution, and cross-functional https://jobeax.com/link/ZxqACVEpk2fb7E67 Responsibilities :- Lead and mentor a team of RTL Design Engineers, providing technical guidance and career development.- Drive RTL design activities from architecture review through ...
... Lead a team of ASIC digital design and verification engineers working on HBM, DDR, and LPDDR memory interface IP- Own the technical direction and execution of RTL design and verification at both block and chip integration levels- Drive design reviews, architecture decisions, and quality checkpoints across the full development ...
... scripting technologies.- Review and guide verification architecture, test plans, environments, and critical verification components.- Collaborate with architecture, RTL design, firmware, validation, and system engineering teams.- Mentor senior engineers and technical leads and establish engineering best practices.- Drive technical ...
... verification of AMBA protocols and ARM CPU-based systems.- Work on PCI Express and/or Ethernet protocol verification as required.- Analyze complex failures and lead root-cause debugging across RTL, testbench, and system-level environments.- Collaborate closely with RTL designers, architects, firmware, validation, and system ...
... validation, debug, and product qualification activities. - Assist in root-cause analysis and resolution of silicon issues when required. - Provide technical leadership for future product enhancements and next-generation designs. Team Leadership & Management - Lead, mentor, and manage a team of SoC/RTL design engineers. ...
... standards for design quality, code reviews, and engineering discipline What You'll Need - 10+ years of hands-on ASIC digital design experience with deep expertise in RTL development, microarchitecture, and IP design - 3+ years in a technical leadership or engineering management role, with demonstrated ability to lead, mentor, ...
... technical execution and business delivery, ensuring complex chips tape out on time with optimal Power, Performance, and Area (PPA).Responsibilities :Technical Leadership :- RTL-to-GDSII Execution : Directly own and participate in the full physical design flow including floorplanning, power grid design, placement, CTS (Clock ...
... design documents, RTL implementations, and verification plans. - Ensure IP designs achieve performance, power, area (PPA), reliability, and quality targets. - Lead technical reviews and provide guidance on complex design challenges. - Drive design trade-off decisions and risk mitigation strategies. - Lead the post-silicon ...
... candidates with strong hands-on experience in RTL development, Verilog/SystemVerilog, SoC/Subsystem design, NoC, and ASIC design flows . What You Will Work On - Design and develop synthesizable RTL using Verilog/SystemVerilog. - Convert microarchitecture specifications into RTL implementations. - Own block-level RTL design, ...
... Summary: Job Overview We are seeking a highly motivated Synthesis Engineer/Lead to join our NPU (Neural Processing Unit) design team. In this role, you will drive RTL-to-GDS synthesis and timing closure for high-performance AI/ML accelerators used in next-generation SoCs. You will work closely with Architecture, RTL Design, ...
... timing violations.- Implement timing fixes and optimize designs for performance, area, and power.- Perform and resolve DRC and LVS violations.- Analyze physical design issues and work towards effective closure.- Work with cross-functional teams including RTL design, STA, verification, and physical verification teams.- Use industry-standard ...