Role : Principal / Lead RTL Design EngineerAbout the Role : We are looking for a highly experienced Principal / Lead RTL Design Engineer to provide technical leadership for complex ARM-based ASIC/SoC development programs. The role involves driving RTL architecture and implementation, owning critical subsystems, defining ...
... through implementation and sign-off. Responsibilities and Duties - Provide technical leadership for microarchitecture, RTL design and SoC integration, driving design decisions and trade-offs across functionality, performance, power and area. - Lead engineering execution and delivery of complex SoC designs, ensuring alignment ...
... scripting technologies.- Review and guide verification architecture, test plans, environments, and critical verification components.- Collaborate with architecture, RTL design, firmware, validation, and system engineering teams.- Mentor senior engineers and technical leads and establish engineering best practices.- Drive technical ...
... verification of AMBA protocols and ARM CPU-based systems.- Work on PCI Express and/or Ethernet protocol verification as required.- Analyze complex failures and lead root-cause debugging across RTL, testbench, and system-level environments.- Collaborate closely with RTL designers, architects, firmware, validation, and system ...
Role : Physical Design EngineerACL Digital is looking for a Physical Design Engineer to lead end-to-end RTL-to-GDSII execution for high-performance FinFET ASICs across 16nm - 5nm and dual-patterning technology nodes. The role focuses on physical implementation, timing and power optimization, physical verification, and automated ...
Job Title : Senior Physical Design Engineer / LeadExperience : 9-14 YearsLocation : Bangalore / Kochi / Chennai / PuneEmployment Type : Full-timeAbout the Role : Neurealm is seeking an experienced Senior Physical Design Engineer / Lead to drive physical implementation activities for complex ASIC/SoC https://jobeax.com/link/Ed3TrripOdfvyAWA ...
Job Title : Senior Physical Design Engineer / LeadExperience : 9-14 YearsLocation : Bangalore / Kochi / Chennai / PuneEmployment Type : Full-timeAbout the Role : Neurealm is seeking an experienced Senior Physical Design Engineer / Lead to drive physical implementation activities for complex ASIC/SoC https://jobeax.com/link/Ed3TrripOdfvyAWA ...
... related discipline. * 10+ years of relevant industry experience in ASIC digital design, with a focus on protocols like DDR, PCIe, USB, or HBM. * Past experience of leading IP deign projects, team. * In-depth experience with RTL coding in Verilog/System Verilog and simulation tools for ASIC design. * Strong command of design flows, ...
... improve physical design methodologies, flows, and sign-off practices.- Identify technical risks early in the implementation cycle and drive mitigation plans.- Lead debugging and root-cause analysis of complex physical design and timing issues.- Collaborate with RTL design, architecture, synthesis, STA, verification, and ...
... improve physical design methodologies, flows, and sign-off practices.- Identify technical risks early in the implementation cycle and drive mitigation plans.- Lead debugging and root-cause analysis of complex physical design and timing issues.- Collaborate with RTL design, architecture, synthesis, STA, verification, and ...
... predictability from RTL to GDSII. Qualifications & Skills - Education & Experience: Bachelor’s or Master’s degree in Electrical/Electronics Engineering, VLSI Design, or a related field, with 8+ years of experience in semiconductor physical design, with a strong focus on clocking architecture and implementation. - Technical ...