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We are looking for a hands-on FPGA Engineer to design and develop FPGA solutions for next-generation CXL and PCIe Gen6/Gen7 protocol test products. The engineer will work closely with FPGA architects, hardware, software, validation, and system teams to implement, integrate, debug, and validate FPGA functionality.
Responsibilities
Design and implement FPGA logic for CXL and PCIe Gen6/Gen7 protocol solutions.
Translate protocol and product requirements into RTL design and implementation.
Develop and maintain RTL using Verilog and/or VHDL.
Work with Intel/Altera and/or AMD/Xilinx FPGA tools and design flows.
Perform functional simulation, synthesis, implementation, timing analysis, and FPGA debug.
Work closely with hardware and software teams for FPGA integration and platform bring-up.
Debug protocol, hardware, FPGA, and system-level issues.
Participate in validation, performance optimization, and product qualification.
Contribute to reusable and maintainable FPGA components and verification practices.
Use AI/ML and AI-assisted engineering tools to improve productivity, RTL development, verification, debugging, documentation, and automation.
Collaborate effectively with cross-functional and global engineering teams.
Qualifications
Essential
Bachelor's or Master's degree in Electrical/Electronics Engineering or related field.
5+ years of FPGA design and development experience.
Strong hands-on experience with RTL design using Verilog and/or VHDL.
Good understanding of FPGA architecture, digital design, simulation, synthesis, and timing.
Experience with FPGA development tools from Intel/Altera and/or AMD/Xilinx.
Ability to debug FPGA designs and work with hardware/software integration.
Strong problem-solving and communication skills.
Ability to quickly learn new protocols and technologies.
Preferred
Strong knowledge of CXL and/or PCIe protocols.
Experience with PCIe Gen5/Gen6/Gen7 or other high-speed interconnect technologies.
Experience with protocol analyzers, exercisers, or validation platforms.
Experience with FPGA-based high-speed test systems.
Experience with hardware bring-up and lab debugging.
Experience using AI/ML or GenAI tools to improve engineering productivity and automation.
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