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We are looking for a hands-on FPGA Architect to architect, design, develop, and debug next-generation CXL and PCIe Gen6/Gen7 protocol solutions. This is a hands-on technical leadership role in a small team. The architect will define FPGA architecture while also writing RTL, implementing features, debugging designs, and supporting hardware/software integration and platform bring-up.
Responsibilities
Define and own FPGA architecture for CXL- and PCIe-based protocol solutions, with CXL as the primary focus.
Translate CXL and PCIe Gen6/Gen7 protocol and product requirements into scalable FPGA architectures and implementation plans.
Personally design, code, simulate, review, and debug production RTL in Verilog and/or VHDL.
Work hands-on with Intel/Altera and/or AMD/Xilinx FPGA tools for synthesis, implementation, constraints, timing closure, and resource optimization.
Develop and execute simulation and verification for FPGA designs using industry-standard EDA tools.
Drive FPGA integration with hardware and software and support platform bring-up, debug, and system validation.
Analyze complex protocol, performance, interoperability, and system issues and drive root-cause resolution.
Collaborate closely with hardware, software, validation, system, product, and global engineering teams.
Mentor engineers and contribute to architecture, design, and code reviews while remaining a hands-on implementer.
Use AI/ML and AI-assisted engineering tools to improve RTL development, verification, debugging, documentation, automation, and engineering productivity.
Qualifications
Essential
Bachelor's or Master's degree in Electrical/Electronics Engineering or related field.
8+ years of FPGA architecture, design, and development experience.
Strong hands-on experience with CXL and/or PCIe protocols.
Strong experience with Verilog/VHDL and RTL design.
Experience with Intel/Altera and/or AMD/Xilinx FPGA tools and design flows.
Experience with functional simulation, FPGA debug, synthesis, and timing analysis.
Experience integrating FPGA with hardware and software.
Strong problem-solving, communication, and collaboration skills.
Ability to quickly learn new technologies and protocols.
Preferred
Strong experience with PCIe Gen6/Gen7 and CXL.
Experience with protocol analyzers, exercisers, validation platforms, oscilloscopes, BERTs, or related high-speed test equipment.
Experience with FPGA-based high-speed test systems and hardware bring-up.
Exposure to NVMe, storage systems, or data-center interconnect technologies.
Experience using AI/ML or GenAI tools to improve engineering productivity and automation.
Experience working with global engineering teams across the US, Europe, and Asia.
What Success Looks Like
Defines a robust CXL-first FPGA architecture and personally delivers critical RTL/features; enables clean hardware/software integration and platform bring-up; and raises team capability through technical leadership, mentoring, and hands-on resolution of difficult system issues.
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