Design & Verification SoC Engineer in Hyderabad, भारत

Job Overview : We are looking for an experienced Design and Verification SoC Engineer with 10+ years of experience in SoC/ASIC Design Verification. The ideal candidate should have strong expertise in SystemVerilog, UVM, verification methodologies, testbench development, functional verification, debugging, and coverage https://jobeax.com/link/DGkqER9pDSGHGd0h candidate will work closely with Design, Architecture, and Verification teams to ensure robust verification of IP, subsystems, and complete SoC https://jobeax.com/link/rMnbNp0XqPXF3JLa Responsibilities : - Perform SoC and ASIC design verification across IP, subsystem, and SoC levels.- Develop and maintain verification environments using SystemVerilog and UVM.- Design, develop, and execute comprehensive verification testbenches and test scenarios.- Perform functional verification of RTL designs and identify design/verification issues.- Debug simulation failures and work closely with design teams to resolve issues.- Drive coverage analysis and coverage closure to ensure verification completeness.- Apply industry-standard verification methodologies and best practices.- Work with RTL design teams to understand specifications, architecture, and design intent.- Participate in verification planning, test development, execution, and sign-off activities.- Contribute to verification of IP, subsystem, and SoC-level designs.- Analyze verification results and identify potential design or functional issues.- Collaborate effectively with Design, Architecture, and Verification teams throughout the development lifecycle.- Provide technical inputs for improving verification quality, efficiency, and https://jobeax.com/link/KV5FBDTH5dR5o31z Skills : - 10+ years of experience in SoC/ASIC Design Verification.- Strong hands-on expertise in SystemVerilog.- Strong experience with UVM and UVM-based verification environments.- Hands-on experience in ASIC/SoC verification.- Strong understanding of verification methodologies and testbench development.- Experience in functional verification, debugging, and coverage closure.- Good understanding of RTL design and verification flows.- Experience in IP, subsystem, and SoC-level verification.- Strong analytical, problem-solving, and debugging skills.- Ability to collaborate effectively with Design, Architecture, and Verification teams. (ref:hirist.tech)