As a CPU Design Verification Engineer, you'll play a pivotal role in ensuring the functional correctness and performance of Altera's RISC-V processor family. Working alongside world-class CPU architects, RTL designers, and system design teams, you'll help validate designs that meet rigorous functional, performance goals. Perform in-depth functional coverage analysis, identify critical verification gaps, and implement strategic closure plans

Debug and perform root-cause analysis of issues in pre-silicon environments, implementing robust corrective measures

Develop automation scripts and tools using Python, Perl, C++, or similar languages to optimize verification workflows

Contribute to CPU architecture and microarchitecture feature definition to achieve optimal functional and performance targets

Bachelor's or Master's degree in Electronics Engineering, Computer Engineering.

8+ years of experience in ASIC or FPGA design verification.
Expertise in Hardware Description Languages (HDL) like Verilog or VHDL and Hardware Verification Languages (HVL) such as System Verilog.
Strong hands-on experience in developing UVM-based testbenches and verification components.
Experience with RISC-V instruction set architecture.
Experience with simulation and debug tools (e.g., Strong scripting skills in Python, Perl, or Tcl for automation and data analysis.
Shift

Shift 1 (India)

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Design Validation Engineer - Electronic

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