Back to list

Vacancy description

ASIC Digital Design, Sr Staff Engineer in Noida, भारत

Synopsys Inc

  • RemoteWork from anywhere

Noida, भारत

Category Engineering Hire Type Employee Job ID 19181 Remote Eligible No Date Posted 10.12.2026

ASIC Verification Engineer, Staff

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, enabling everything from self-driving cars to advanced learning machines. As the global leader in EDA tools, semiconductor IP, and silicon engineering solutions, we empower the creation of the world’s most advanced chips across AI/ML, high-performance computing, automotive, cloud, and mobile applications. Within our division, we develop and deliver interface subsystems that power industry-leading SoCs. Join us to transform the future through continuous technological innovation and world-class engineering excellence.

You Are:

You are an enthusiastic engineer who thrives at the intersection of various interface IPs. Your analytical mindset and collaborative spirit drive you to solve complex technical challenges that shape the future of connectivity. You are passionate about deepening your expertise and excited by the opportunity to work on advanced DDR/HBM/PCIe/UCIe/Ethernet/UALink IP integration deployed in the most innovative SoCs. You value technical mastery, teamwork, mentorship, and the continuous pursuit of innovation. Your curiosity leads you to understand diverse interface IPs, and you ensure the highest standards of silicon performance through meticulous attention to detail. Navigating simulation environments and debugging challenging issues is second nature to you, and you excel at collaborating with teams across the globe. 

What You’ll Be Doing:

  • Technically leading and driving ownership of critical areas of verification alongside a team of talented verification engineers.
  • Defining, implementing, and tracking comprehensive verification test plans to ensure robust coverage and quality.
  • Specifying, building, enhancing, and maintaining state-of-the-art Subsystem top-level UVM-based System Verilog testbenches, integrating RTL and behavioral models
  • Coding and debugging test cases, including the creation of complex checkers and assertions using System Verilog/UVM.
  • Extracting and reviewing functional coverage (FC) and code coverage metrics to ensure quality metric goals are met.
  • Managing regressions and contributing to the continuous improvement of verification strategies and test environments.
  • Debugging and resolving simulation failures, ensuring root-cause analysis and timely solutions.
  • Working closely with RTL designers and architects to ensure functional correctness.

The Impact You Will Have:

  • Drive quality that powers AI, automotive, cloud, and mobile applications at massive scale.
  • Advance the state-of-the-art in AI assisted verification methodologies, influencing future verification flows and processes.
  • Contribute to the early detection and resolution of critical design issues, reducing time-to-market and silicon re-spins.
  • Collaborate with a global team of experienced verification engineers, fostering knowledge sharing and professional growth.
  • Bolster Synopsys' leadership in chip design by ensuring our IP verification methodologies set industry standards.

What You’ll Need:

  • Bachelor's or Master's degree in electronics/electrical engineering or related field, with 8+ years’ experience in ASIC/FPGA Verification.
  • Ability to debug and define robust verification strategies; experience mentoring is a plus for senior candidates.
  • Demonstrated experience in technically leading a team, record of successful collaboration and stakeholder management.
  • Proven expertise in developing System Verilog/UVM based test environments for complex ASIC designs.
  • Advanced skills in developing and implementing rigorous test plans, checkers, assertions, and coding complex tests.
  • Strong proficiency in extracting and analyzing verification metrics such as functional coverage and code coverage.
  • Experience with interface protocols and IP design/verification processes; knowledge of DDR/HBM/PCIe/UCIe/Ethernet/UALink is highly desirable.
  • Hands-on experience in owning end-to-end verification deliverables for IPs, including planning, execution, DV metrics closure, and review/signoff.

Who You Are:

  • Analytical and detail-oriented, with strong problem-solving and debugging skills.
  • Initiative-taking and driven to deliver high-quality results in a fast-paced environment.
  • Seeking feedback, sharing knowledge, and mentoring others when possible.
  • Collaborative leader who inspires and mentors team members to achieve their best.
  • Analytical thinker with strong critical thinking skills and a commitment to quality.
  • Exceptional communicator, able to bridge technical and non-technical stakeholders.
  • Self-motivated and proactive, with a passion for continuous learning and professional development.
  • Adaptable and resilient in the face of complex challenges and changing priorities.


The Team You'll Be Part Of
Your recruiter will share more about the team structure and mission during the interview process.
Rewards and Benefits
We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Similar vacancies

More like this role

  • Remote
... across sites will keep globally distributed projects on track and reduce friction in cross-functional handoffs What You'll Need - Bachelor's in Electrical Engineering with 8+ years of hands-on ASIC or IP design experience, or Master's with 6+ years - Deep RTL design experience on IP cores or SoC subsystems that have taped ...

Bangalore, भारत

  • Remote
... Synopsys’ reputation for delivering robust, scalable, and innovative silicon solutions in a fast-evolving industry. What You’ll Need: - BSEE or MSEE in Electrical Engineering, with 12+ years of relevant industry experience in ASIC digital design. - Proficiency in one or more protocols: Ethernet, DDR, Die-to-Die Communication, ...

Hyderabad, भारत

  • Remote
... silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a passionate and detail-oriented ASIC Digital Design professional who thrives in high-tech, fast-paced environments. With a strong foundation in Design-for-Testability (DFT) methodologies, you enjoy ...

Hyderabad, भारत

  • Remote
  • Full-time
Category Engineering Hire Type Employee Job ID 18642 Remote Eligible No Date Posted 09.08.2026 We Are Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and ...

Hyderabad, भारत

... industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow. You Are You are an early-career engineer ready to make your mark in semiconductor design. You have spent your academic years drawn to digital design that requires proof, not just simulation. When you ...

Bangalore, भारत

  • Remote
  • Full-time
... over-communicating The Team You'll Be Part Of You will be part of an engineering team dedicated to implementing UCIe PHY and testchips. The team focuses on the full physical design flow, encompassing synthesis, physical design, verification, design for test, and ATPG. You will collaborate with both internal and external design teams, contributing ...

Hyderabad, भारत

  • Remote
  • Full-time
... over-communicating The Team You'll Be Part Of You will be part of an engineering team dedicated to implementing UCIe PHY and testchips. The team focuses on the full physical design flow, encompassing synthesis, physical design, verification, design for test, and ATPG. You will collaborate with both internal and external design teams, contributing ...

Hyderabad, भारत

  • Remote
  • Full-time
... sharing knowledge, documenting best practices, and building flows others can learn from and extend What You'll Need - Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related discipline - 5+ years of hands-on ASIC physical design experience with proven silicon tape-outs, ideally ...

Hyderabad, भारत

  • Remote
  • Full-time
... over-communicating The Team You'll Be Part Of You will be part of an engineering team dedicated to implementing UCIe PHY and testchips. The team focuses on the full physical design flow, encompassing synthesis, physical design, verification, design for test, and ATPG. You will collaborate with both internal and external design teams, contributing ...

Hyderabad, भारत

  • Remote
  • Full-time
... critical paths - Develop layout automation, generators, validation flows, and productivity tools using scripting languages to accelerate execution and improve design quality - Mentor staff and senior layout engineers across multiple projects and sites, providing technical guidance, reviewing critical design decisions, and ...

Noida, भारत