Apprentice (Technical-Engineer) in Bangalore, भारत

Category Interns/Temp Hire Type Intern Job ID 19509 Remote Eligible No Date Posted 10/28/2026

Job Description:

• VLSI Characterization Apprentice
• Standard Cell Library Development Apprentice
• CMOS Circuit Simulation Apprentice
• Digital Library Characterization Trainee
• Semiconductor Characterization Trainee

We Are

Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.

You Are

You are someone who wants to learn how semiconductor design works, not from slides or theory, but by running real simulations on real circuits that will ship in real products. You spent time in the college understanding CMOS fundamentals and digital logic, and now you want to see how that knowledge translates into production-quality standard cell libraries. 

You are looking for a structured learning experience where you can work alongside engineers who have been doing characterization and library development for years. You want to build skills that matter, transistor-level debugging, EDA tool fluency, automation scripting, and the discipline to document your work so others can build on it. 

What You'll Be Doing

• Run transistor-level simulations on digital standard cells using industry-standard circuit simulators to extract timing, power, and leakage data across PVT corners

• Analyze CMOS circuit behavior at the transistor level, reviewing schematics, debugging simulation failures, and identifying issues in logic implementation or device models
• Support characterization and validation of standard cell libraries by running automated flows, reviewing results, and flagging anomalies or quality issues
• Document simulation results, technical findings, and circuit-level observations in clear, structured reports that senior engineers can act on
• Collaborate with library development engineers to improve characterization methodologies, refine automation scripts, and close gaps in coverage or accuracy
• Learn and apply concepts from Liberty (.lib) format, Static Timing Analysis, and low-power design as you work through real library development cycles
• Participate in technical reviews and team discussions to understand how characterization fits into the broader semiconductor design and IP development process

The Impact You Will Have

• You will contribute to production-quality standard cell libraries that power chip designs across automotive, mobile, AI, and data center applications
• Your simulations and analysis will help catch timing, power, or functional issues before they reach customers, protecting design schedules and silicon success
• The characterization data you generate will support SoC designers as they meet performance, power, and area targets
• Your debugging work will surface circuit-level insights that improve library quality and inform next-generation design decisions
• You will help build and refine automation flows that make characterization faster, more accurate, and more scalable across technology nodes
• The documentation and analysis you create will enable senior engineers to make data-driven decisions about library tradeoffs and optimization strategies
• You will develop a strong foundation in semiconductor characterization and EDA tools that prepares you for the next stage of your engineering career
  

What You'll Need

• B.E. or https://jobeax.com/link/2DENLGgQM7whDhaE in Electronics, Electrical Engineering, VLSI, Microelectronics, or a related field
• 0 to 2 years of experience, fresh graduates are eligible and encouraged to apply
• Strong understanding of CMOS fundamentals including MOSFET operation, inverter characteristics, static and dynamic logic, noise margins, delay, power dissipation, and leakage mechanisms
• Solid knowledge of digital logic design including combinational and sequential circuits, Boolean algebra, flip-flops, latches, and timing concepts like setup, hold, recovery, and removal
• Familiarity with at least one circuit simulator such as PrimeSim, FineSim, and the ability to read and debug transistor-level schematics
• Comfort working in Linux or Unix environments, basic scripting knowledge in Python, Perl, Tcl, or Shell is a plus
• Exposure to standard cell libraries, Liberty format, or Static Timing Analysis concepts is a plus

Who You Are

• You can look at a simulation waveform and spot when something is off, whether it is a timing violation, a leakage spike, or a logic glitch, and you are willing to dig in until you understand why
• You are comfortable working through ambiguity, if a simulation fails or results look strange, you check the netlist, review the setup, and try different scenarios before asking for help
• You take ownership of your work, when you run a characterization sweep or debug a circuit, you make sure the results are correct and the documentation is clear enough for someone else to pick up where you left off
• You communicate technical details clearly, whether you are writing up a simulation summary, flagging an issue in a review, or explaining a circuit behaviour to a peer or mentor
• You are genuinely curious about how things work at the transistor level and eager to learn advanced EDA tools, characterization flows, and semiconductor technologies from experienced engineers

Key Program Facts:

Rewards and Benefits

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.