ACL Digital - Design Verification Engineer - System Verilog/UVM in Hyderabad, भारत
ALTEN CALSOFT LABS (INDIA) PRIVATE LIMITED
Hyderabad, भारत
Role : Design Verification EngineerACL Digital is seeking a Design Verification Engineer with hands-on experience in SystemVerilog and UVM-based verification. The role involves developing block/IP-level testbenches, executing verification plans, managing regressions, and performing real-number modeling and Gate-Level Simulation (GLS).Key Responsibilities : - Develop and maintain block/IP-level testbenches using SystemVerilog and UVM.- Execute verification plans (Vplan) and track verification progress.- Manage regression runs and analyze verification results.- Work on real-number modeling for design verification.- Perform Gate-Level Simulations (GLS).- Support subsystem and SoC-level verification activities, where https://jobeax.com/link/g3fodVl7LLxPdvXs Skills : - 3+ years of experience in design verification.- Strong knowledge of SystemVerilog and UVM.- Experience in block/IP-level testbench development and Vplan execution.- Hands-on experience with regression management, real-number modeling, and GLS.- Subsystem/SoC verification experience is an added advantage.- Ability to join within 0 - 30 days (ref:hirist.tech)
Verification / Firmware EngineerACL Digital is looking for an experienced Verification / Firmware Engineer to contribute to large-scale ASIC development https://jobeax.com/link/kS6lr8ikjUi7EbPN role focuses on software-driven verification, firmware development, system-level debugging, and validation of hardware functionality ...
Role : Physical Design EngineerACL Digital is looking for a Physical Design Engineer to lead end-to-end RTL-to-GDSII execution for high-performance FinFET ASICs across 16nm - 5nm and dual-patterning technology nodes. The role focuses on physical implementation, timing and power optimization, physical verification, and automated ...
... preferably in automotive semiconductor development.- https://jobeax.com/link/2DENLGgQM7whDhaE or https://jobeax.com/link/s1WvHFV9ITSwCkyS in Electronics, Electrical Engineering, VLSI, or a related discipline.- Strong hands-on experience with Verilog and SystemVerilog.- Understanding of digital design principles and RTL coding practices.- ...
... and SoC projects across global teams * Define, document, and propagate verification methodologies and best practices that become the standard across Synopsys digital IP projects * Lead and mentor verification engineers, providing technical guidance on UVM, SystemVerilog, flow optimization, and debugging strategies * Drive ...
... SCAN DRC, coverage debugging, and ATPG pattern generation.- Experience with zero-delay and timing-delay gate-level simulations.- Knowledge of JTAG and P1500 protocols.- Proficiency in Perl/Tcl scripting.- Knowledge of timing, formal verification, or physical design (PD) flows is an added advantage (ref:hirist.tech) []
... internship experience. - Doctorate degree in Electrical Engineering Computer Engineering Computer Science or related field. - 5 years of industry experience in design verification with a delivering complex Application Specific Integrated Circuits(ASIC) or System on Chip(SOC). Additional Qualifications: - 7 years of industry ...
... internship experience - OR Doctorate degree in Electrical Engineering Computer Engineering Computer Science or related field. - Experience inexecuting pre-silicon verification of IPs/Sub Systems/SoCs through full cycle. - Background in creating and debugging IP/SoC Level tests in SV-UVM/C. - In depth knowledge of verification principles ...
... industry-leading semiconductor solutions, we are enabling innovative growth in market segments in component solutions, featuring industry-leading technologies in System LSI, Memory and Foundry. Our engineers are offered a foundation to work on cutting-edge technologies such as Foundation IP Design, Mobile SoCs, Storage Solutions, ...